WCET Analysis Considering Contention on Memory Bus in COTS-Based Multicores
Ref: HURRAY-TR-111001 Publication Date: 5 to 9, Sep, 2011
WCET Analysis Considering Contention on Memory Bus in COTS-Based Multicores
Ref: HURRAY-TR-111001 Publication Date: 5 to 9, Sep, 2011Abstract:
The usage of COTS-based multicores is becoming widespread in the field of embedded systems. Providing real-time guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores. This necessitates the consideration of the impact of the contention due to shared low-level hardware resources on the Worst-Case Execution Time(WCET) of the tasks. As a step towards this aim, this paper first identifies the different factors that make the WCET analysis a challenging problem in a typical COTS-based multicore system.Then, we propose and prove, a mathematically correct method to determine tight upper bounds on the WCET of the tasks, when they are co-scheduled on different cores.
Dakshina Dasari
Vincent Nélis
Björn AnderssonDocument:
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Download16th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA 2011), Work-In-Progress Session.
Toulouse, France.
WOS ID: 000297542900194.
Record Date: 5, Sep, 2011
Short links for this page: www.cister-labs.pt/docs/000297542900194_ www.cister-labs.pt/docs/hurray_tr_111001 www.cister-labs.pt/docs/653